Difference between revisions of "Sachen Mappers"
m (→ROM Bank Register: clarify "zero-adjustment") |
m (→Sachen MMC1: fix bad typo for ROM bank mask register) |
||
| Line 30: | Line 30: | ||
* 0x0000-0x1FFF: Base ROM bank register | * 0x0000-0x1FFF: Base ROM bank register | ||
* 0x2000-0x3FFF: ROM bank register | * 0x2000-0x3FFF: ROM bank register | ||
| − | * 0x4000- | + | * 0x4000-0x5FFF: ROM bank mask register |
Memory Map: | Memory Map: | ||
| Line 115: | Line 115: | ||
Changes to this register take immediate effect. | Changes to this register take immediate effect. | ||
The width of this register is based off the fact that the [[#ROM Bank Register]] only contains 4 bank bits as well as the fact that there are only four high address lines on the TB-002 PCB. | The width of this register is based off the fact that the [[#ROM Bank Register]] only contains 4 bank bits as well as the fact that there are only four high address lines on the TB-002 PCB. | ||
| − | |||
= Sachen MMC2 = | = Sachen MMC2 = | ||
Revision as of 03:55, 23 August 2014
Several Sachen Mappers are thought to exist.
| Name | Comment |
|---|---|
| Sachen MMC1 | MMC for mono 4B games. |
| Sachen MMC2 | MMC for color 1B games. |
| Sachen MMC3 | MMC for color 4B games.
MMC for color 8B games. MMC for color 16B games. |
| Sachen MMC4 | MMC for Mighty 31 in 1 Mix. |
Contents
Sachen MMC1
4B-005 on TG-002 and 4B-007 on SA-111 tested.
Write-Accessible Registers:
- 0x0000-0x1FFF: Base ROM bank register
- 0x2000-0x3FFF: ROM bank register
- 0x4000-0x5FFF: ROM bank mask register
Memory Map:
- 0x0000-0x3FFF: Mapped ROM bank #0
- 0x4000-0x7FFF: Mapped Switchable ROM bank
- 0x8000-0xFFFF: Unused
Mapped here means adjusted for absolute Base ROM bank.
Modes of Operation
Sachen MMC1 has two modes of operation locked and unlocked. It defaults to locked after reset.
This is used to display the Sachen logo instead of the Nintendo logo for the DMG bootstrap ROM. While locked, the mapper will keep RA7 set.
The unlock sequence is 0x31 transitions of A15 from high to low. Starting on the last transition, RA7 will follow A7. All control signals are don't cares for this.
Other functionality seems to be unaffected by the lock register: switching banks and remapping work while locked
The only way to lock the mapper after unlocking is to reset it.
Multi Memory Remap
Base ROM Bank and ROM Bank Mask Register are used for remapping 0x0000-0x7FFF to be based on a new base ROM bank.
The mapping function is:
(rb & ~mask) | (mask & rb_base)
Header Scramble
Sachen chose to scramble the header of their games. When A8 is high, while A15..A9 are low, the mapper will perform the following map:
RA0 <= A6 RA1 <= A4 RA4 <= A1 RA6 <= A0
When A8 is low or A15..A9 are not low, RAn lines will track their respective An line.
ROM Bank Register
The ROM bank register is zero-adjusted, i.e. if 0x00 is written, 0x01 will be stored. Zero-adjustment is done on all 8 input bits D7..D0. However, only D5..D0 are seemingly used. This means, that ROM Bank 0x00 can be mapped to 0x4000-0x7FFF by abusing the overflow in this register.
XX XX D5 D4 D3 D2 D1 D0
\___/ \_________/
| \-------- ROM Bank
\----------------- Map Enable
ROM Bank bits switch the bank mapped to 0x4000-0x7FFF. Map Enable bits are used to enable write access to the #Base ROM Bank Register and #ROM bank mask register. 0b11 means these registers can be written, other values will not grant write access.
The width of this register is based off the fact that there are only four high address lines on the TB-002 PCB. The Map Enable bits were not observed to have any effect on mapping.
Base ROM Bank Register
This register stores the base ROM bank.
XX XX XX XX D3 D2 D1 D0
\_________/
\-------- Base ROM Bank
This register writable without limitation when Map Enable in the #ROM Bank Register is 0b11. Changes to this register take immediate effect. The width of this register is based off the fact that the #ROM Bank Register only contains 4 bank bits as well as the fact that there are only four high address lines on the TB-002 PCB.
ROM bank mask register
This register stores the ROM bank mask.
XX XX XX XX D3 D2 D1 D0
\_________/
\-------- ROM Bank Mask
This register writable without limitation when Map Enable in the #ROM Bank Register is 0b11. Changes to this register take immediate effect. The width of this register is based off the fact that the #ROM Bank Register only contains 4 bank bits as well as the fact that there are only four high address lines on the TB-002 PCB.
Sachen MMC2
No info as of now.
Sachen MMC3
No info as of now.
Sachen MMC4
No info as of now.
Miscellaneous Information
Too bad Sachen screwed up (on 4B-007 at least) and actually writes the base RB to the mask register and the mask to the base RB register, thus all games having broken masking. But due to power-of-2 sizes of RBs and masks, it turns out that only a few extra RBs are mappable which shouldn't be instead of the games skipping ROM banks.
I noticed that the Sachen logo check -- VRAM comparison of Sachen logo starting at 0x8010 -- was disabled in the mapped games. I also noticed that games do write to 0x0000-0x1FFF while being mapped, so this may have some effect. Technically, since A15..A6, A4, A1, A0 are connected, there might be many registers mapped. Initial tests show this not to be the case.
